dts: stm32u5: disable otghs-phy by default #97168
Conversation
zephyrbot
requested review from
FRASTM,
GeorgeCGV,
djiatsaf-st,
erwango,
etienne-lms,
gautierg-st,
marwaiehm-st and
mathieuchopstm
There was a problem hiding this comment.
Selecting SYSCFG_OTG_HS_PHY_CLK_16MHz in these board is related to the HSE clock being at 16MHz. For a new board that would have another HSE frequency, this value would need to be updated among the supported ones, or PHY source clock be changed (OTGHS_SEL(0)).
It makes sense usbhs_phy node is default disabled at SoC DTSI level, but I don't think the SoC DTSI can set a default clock-reference value, it should remain at board DTS level.
|
I agree, the board should set both |
lindblandro
force-pushed
the
stm32u5-dts-disable-otghs-phy
branch
from
8ba4935 to
595fdff
Compare
Yeah that makes a lot more sense. 👍 |
Fixed this. |
The clock-reference property is marked as required in the bindings file. Without these changes creating new boards based on stm32u5 either requires explicitly disabling otghs_phy or setting the clock-reference -property. Signed-off-by: Henrik Lindblom <[email protected]>
lindblandro
force-pushed
the
stm32u5-dts-disable-otghs-phy
branch
from
595fdff to
fa4a4f3
Compare
|
8 participants
The clock-reference property is marked as required in the bindings file. Without these changes creating new boards based on stm32u5 either requires explicitly disabling otghs_phy or setting the clock-reference -property. The in-tree boards all use the same value for it, which is probably a sensible default.